P4FL: An Architecture for Federating Learning With In-Network Processing

被引:2
|
作者
Sacco, Alessio [1 ]
Angi, Antonino [1 ]
Marchetto, Guido [1 ]
Esposito, Flavio [2 ]
机构
[1] Politecn Torino, Dept Control & Comp Engn, I-10129 Turin, Italy
[2] St Louis Univ, Dept Comp Sci, St Louis, MO 63103 USA
来源
IEEE ACCESS | 2023年 / 11卷
基金
美国国家科学基金会;
关键词
Servers; Training; Data models; Solid modeling; Federated learning; Computer architecture; Multiprotocol label switching; Machine learning; Data plane programmability; federated learning; machine learning; network processing; p4;
D O I
10.1109/ACCESS.2023.3318109
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The unceasing development of Artificial Intelligence (AI) and Machine Learning (ML) techniques is growing with privacy problems related to the training data. A relatively recent approach to partially cope with such concerns is Federated Learning (FL), a technique in which only the parameters of the trained neural network models are transferred rather than data. Despite the benefits that FL may provide, such an approach can lead to synchronization issues (especially when applied in the context of numerous IoT devices), the network and the server may turn into bottlenecks, and the load may become unsustainable for some nodes. To solve this issue and reduce the traffic on the network, in this paper, we propose P4FL , a novel FL architecture that uses the paradigm of network programmability to program P4 switches to compute intermediate aggregations. In particular, we defined a custom in-band protocol based on MPLS to carry the model parameters and adapted the P4 switch behavior to aggregate model gradients. We then evaluated P4FL in Mininet and verified that using network nodes for in-network model caching and gradient aggregating has two advantages: first, it alleviates the bottleneck effect of the central FL server; second, it further accelerates the entire training progress.
引用
收藏
页码:103650 / 103658
页数:9
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