Auto-LUT: Auto Approximation of Non-Linear Operations for Neural Networks on FPGA

被引:3
作者
Lu, Haodong [1 ]
Mei, Qichang [1 ]
Wang, Kun [1 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai, Peoples R China
来源
2023 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS | 2023年
关键词
Neural Networks; Non-linear Approximation; Quantization; FPGA; PROCESSOR; OPU;
D O I
10.1109/ISCAS46773.2023.10181655
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The approximation of non-linear operation can simplify the logic design and save the system resources during the neural network inference on Field-Programmable Gate Array (FPGA). Prior work can approximate the non-linear operations with piecewise linear (PWL) function, but such approximation neglects considering the hardware overhead simultaneously. This paper proposes a novel approximation framework called Auto-LUT, which leverages a neural network to automatically approximate the non-linear operations. The framework formulates the approximation error and hardware overhead as a multi-objective optimization problem and employs an automated search mechanism to find the minimum number of segments and data bit width. To improve the approximation accuracy, we propose a bias clipping operation during the training of approximation networks, which enforces the model to approximate within the range of interest. Moreover, a hardware-friendly quantization scheme is further introduced to simulate the hardware behavior, thereby reducing the hardware overhead. Finally, a customized hardware architecture based on FPGA is utilized to deploy the quantized result. The experimental results show that Auto-LUT costs 56.32% less LUTs and 32.31% less flip-flops (FF) while reducing 4.32% approximation error compared to the state-of-the-art method.
引用
收藏
页数:5
相关论文
共 26 条
  • [1] [Anonymous], 2022, NEURAL NETWORK INTEL
  • [2] Regularized Random Walk Ranking for Co-Saliency Detection in images
    Bardhan, Sayanti
    Jacob, Shibu
    [J]. ELEVENTH INDIAN CONFERENCE ON COMPUTER VISION, GRAPHICS AND IMAGE PROCESSING (ICVGIP 2018), 2018,
  • [3] Clevert DA, 2016, 4 INT C LEARN REPR I
  • [4] Controlled accuracy approximation of sigmoid function for efficient FPGA-based implementation of artificial neurons
    del Campo, I.
    Finker, R.
    Echanobe, J.
    Basterretxea, K.
    [J]. ELECTRONICS LETTERS, 2013, 49 (25) : 1598 - 1600
  • [5] PLAC: Piecewise Linear Approximation Computation for All Nonlinear Unary Functions
    Dong, Hongxi
    Wang, Manzhen
    Luo, Yuanyong
    Zheng, Muhan
    An, Mengyu
    Ha, Yajun
    Pan, Hongbing
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2020, 28 (09) : 2014 - 2027
  • [6] Sigmoid-weighted linear units for neural network function approximation in reinforcement learning
    Elfwing, Stefan
    Uchibe, Eiji
    Doya, Kenji
    [J]. NEURAL NETWORKS, 2018, 107 : 3 - 11
  • [7] High-Performance FPGA-based Accelerator for Bayesian Neural Networks
    Fan, Hongxiang
    Ferianc, Martin
    Rodrigues, Miguel
    Zhou, Hongyu
    Niu, Xinyu
    Luk, Wayne
    [J]. 2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2021, : 1063 - 1068
  • [8] Communication resource allocation in platooning management based on C-V2X with spectrum sensing
    Gao, Wei
    Wu, Celimuge
    Li, Baozhu
    Guleng, Siri
    [J]. 2021 INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGIES FOR DISASTER MANAGEMENT (ICT-DM), 2021, : 15 - 21
  • [9] Gomar S, 2016, CONF REC ASILOMAR C, P1586, DOI 10.1109/ACSSC.2016.7869646
  • [10] Low Cost Hardware Implementation of Logarithm Approximation
    Gutierrez, R.
    Valls, J.
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 19 (12) : 2326 - 2330