New reliability model for power SiC MOSFET technologies under static and dynamic gate stress

被引：0

作者：

Zerarka, M. ^{[1
]}

Rustichell, V. ^{[1
]}

Perrotin, O. ^{[1
,2
]}

Reynes, J. M. ^{[1
]}

Tremouilles, D. ^{[3
]}

Azzopardi, S. ^{[1
,4
]}

Serre, A. ^{[5
]}

Bergeret, F. ^{[5
]}

Allirand, L. ^{[6
]}

Coccetti, F. ^{[1
]}

机构：

[1] IRT St Exupery, Toulouse, France

[2] ALTER Technol, Toulouse, France

[3] CNRS, LAAS, Toulouse, France

[4] SAFRAN Grp, Paris, France

[5] IPPON Innovat, Toulouse, France

[6] VITESCO Technol, Toulouse, France

来源：

MICROELECTRONICS RELIABILITY | 2023年 / 150卷

关键词：

SiC; HTGB; GSS; Vth degradation; Vth drift planar trench technologies; Modeling;

D O I：

10.1016/j.microrel.2023.115190

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work investigates the Vth degradation of commercial power SiC MOSFET technologies under HTGB and AC stresses with Gate Switching Stress conditions by using relatively accelerated tests whose stressors do not exceed the datasheet specifications. A new model that takes into consideration the variability of the exponent of powerlaw for Vth drift has been proposed and experimentally verified on planar and trench technologies. The proposed model is useful to estimate accurately the lifetime for any condition or complex mission profile.

引用

页数：9

共 16 条

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