A Two-Phase Linear-Exponential Incremental ADC with Second-order Noise Coupling

被引：1

作者：

Wang, Qingxun ^{[1
]}

Pan, Yuhan ^{[1
]}

Chen, Kaiquan ^{[1
]}

Lin, Yu ^{[1
]}

Wang, Biao ^{[2
]}

Qi, Liang ^{[1
]}

机构：

[1] Shanghai Jiao Tong Univ, Dept Micronano Elect, Shanghai, Peoples R China

[2] Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Macau, Peoples R China

来源：

2023 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS | 2023年

基金：

中国国家自然科学基金; 国家重点研发计划;

关键词：

incremental analog-to-digital converter (IADC); linear-exponential; second-order noise coupling (NC); the effective data weighting averaging (DWA) and suppression of thermal noise;

D O I：

10.1109/ISCAS46773.2023.10182049

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This paper presents a two-phase linear-exponential incremental analog-to-digital converter (IADC) with using second-order noise coupling (NC). In the first phase, it works as a first-order IADC. Then the second-order NC path is activated in the second phase to significantly expedite the accumulation speed. Moreover, during the second phase, the integrator is disabled to achieve a large maximum stable amplitude (MSA). Simulations demonstrated that the proposed architecture could achieve a higher signal-to-quantization-noise ratio (SQNR) while avoiding the noise penalty and keeping the high effectiveness of data weighting averaging (DWA) compared with the prior art with using first-order NC. Mathematical analysis and further simulation results are presented to confirm the theory of the proposed structure.

引用

页数：5