Balancing-Based Model Reduction for Fast Power Integrity Verification

被引：1

作者：

Carlucci, Antonio ^{[1
]}

Grivet-Talocia, Stefano ^{[1
]}

Mongrair, Scott ^{[2
]}

Kulasekarar, Sid ^{[2
]}

Radhakrishnan, Kaladhar ^{[2
]}

机构：

[1] Politecn Torino, Dept Elect & Telecommun, Turin, Italy

[2] Intel Corp, Chandler, AZ 85226 USA

来源：

2023 IEEE 32ND CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, EPEPS | 2023年

关键词：

D O I：

10.1109/EPEPS58208.2023.10314870

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper presents a novel Model Order Reduction approach as an extension of the well-known Balanced Truncation. The key contribution is a semi-analytical approach for the numerical evaluation of the Gramian matrices that are functional for optimal reduction of large-scale state-space systems. Application to product-level full-system Power Distribution Networks including integrated voltage regulation circuitry allows transient verification in more than 200x faster than SPICE.

引用

页数：3

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