A novel high-speed low-power sense-amplifier-based flip-flop for digital circuits application

被引：1

作者：

Yuan, Ang ^{[1
,2
]}

Zhao, Huidong ^{[1
,2
]}

Li, Zhi ^{[1
,2
]}

Qiao, Shushan ^{[1
,2
]}

机构：

[1] Chinese Acad Sci, Inst Microelect, Beijing 100029, Peoples R China

[2] Univ Chinese Acad Sci, Beijing 100049, Peoples R China

来源：

IEICE ELECTRONICS EXPRESS | 2023年 / 20卷 / 23期

关键词：

flip-flop; low-power; sense-amplifier; low-voltage operation;

D O I：

10.1587/elex.20.20230446

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a novel sense-amplifier-based flip-flop (SAFF) applied in low-power, high-speed operation. With the employment of the pre-charge control technique and shut-off transistor, the power and delay of the proposed SAFF are significantly reduced. Furthermore, the proposed SAFF can provide low-voltage operation. Post-layout simulation results based on the SMIC 55 nm CMOS process show that the proposed SAFF achieves a 28.9% reduction in the CLK-to-Q delay and a 53.2% decrease in power (25% input data switching activity) and the power-delay product of the proposed SAFF shows 3.0x improvement compared with the conventional SAFF.

引用

页数：6

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