Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs

被引:0
作者
Potestad-Ordonez, Francisco Eugenio [1 ,2 ,3 ]
Casado-Galan, Alejandro [2 ,3 ]
Tena-Sanchez, Erica [1 ,2 ,3 ]
机构
[1] Univ Seville, Escuela Politecn Super, Seville 41011, Spain
[2] CSIC, Inst Microelect Sevilla, IMSE CNM, Seville 41092, Spain
[3] Univ Seville, Seville 41092, Spain
关键词
hardware security; voltage attack; temperature attack; electromagnetic attack; countermeasures; FPGA; CONCURRENT ERROR-DETECTION;
D O I
10.3390/s24051598
中图分类号
O65 [分析化学];
学科分类号
070302 ; 081704 ;
摘要
The majority of data exchanged between connected devices are confidential and must be protected against unauthorized access. To ensure data protection, so-called cryptographic algorithms are used. These algorithms have proven to be mathematically secure against brute force due to the key length, but their physical implementations are vulnerable against physical attacks. The physical implementation of these algorithms can result in the disclosure of information that can be used to access confidential data. Some of the most powerful hardware attacks presented in the literature are called fault injection attacks. These attacks involve introducing a malfunction into the normal operation of the device and then analyzing the data obtained by comparing them with the expected behavior. Some of the most common methods for injecting faults are the variation of the supply voltage and temperature or the injection of electromagnetic pulses. In this paper, a hardware design methodology using analog-to-digital converters (ADCs) is presented to detect attacks on cryptocircuits and prevent information leakage during fault injection attacks. To assess the effectiveness of the proposed design approach, FPGA-based ADC modules were designed that detect changes in temperature and supply voltage. Two setups were implemented to test the scheme against voltage and temperature variations and injections of electromagnetic pulses. The results obtained demonstrate that, in 100% of the cases, when the correct operating voltage and temperature range were established, the detectors could activate an alarm signal when the cryptographic module was attacked, thus avoiding confidential information leakage and protecting data from being exploited.
引用
收藏
页数:15
相关论文
共 38 条
[1]   The sorcerer's apprentice guide to fault attacks [J].
Bar-El, H ;
Choukri, H ;
Naccache, D ;
Tunstall, M ;
Whelan, C .
PROCEEDINGS OF THE IEEE, 2006, 94 (02) :370-382
[2]  
Barenghi Alessandro, 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2010), P7, DOI 10.1109/HST.2010.5513121
[3]   Radiation-induced soft errors in advanced semiconductor technologies [J].
Baumann, RC .
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2005, 5 (03) :305-316
[4]  
Biehl I, 2000, LECT NOTES COMPUT SC, V1880, P131
[5]  
Biham E, 1997, LECT NOTES COMPUT SC, V1294, P513
[6]   Incorporating error detection and online reconfiguration into a regular architecture for the advanced encryption standard [J].
Breveglieri, L ;
Koren, I ;
Maistri, P .
DFT 2005: 20TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, 2005, :72-80
[7]   Error detecting AES using polynomial residue number systems [J].
Chu, Junfeng ;
Benaissa, Mohammed .
MICROPROCESSORS AND MICROSYSTEMS, 2013, 37 (02) :228-234
[8]  
Daemen J, 2001, FEDERAL INFORM PROCE, V197
[9]   Demystifying elliptic curve cryptography : Curve selection, implementation and countermeasures to attacks [J].
Dhanda, Sumit Singh ;
Singh, Brahmjit ;
Jindal, Poonam .
JOURNAL OF INTERDISCIPLINARY MATHEMATICS, 2020, 23 (02) :463-470
[10]   An Efficient FPGA Implementation of ECC Modular Inversion over F256 [J].
Dong, Xiuze ;
Zhang, Li ;
Gao, Xianwei .
ICCSP 2018: PROCEEDINGS OF THE 2ND INTERNATIONAL CONFERENCE ON CRYPTOGRAPHY, SECURITY AND PRIVACY, 2018, :29-33