共 21 条
[1]
Bilzor M., 2012, Proceedings 2012 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2012), P49, DOI 10.1109/HST.2012.6224318
[2]
Processor Verification using Symbolic Execution: A RISC-V Case-Study
[J].
2023 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, DATE,
2023,
[3]
Cadar Cristian, 2008, P 8 USENIX C OP SYST, P209
[4]
Cheang K, 2022, Arxiv, DOI arXiv:2211.02179
[5]
Dimitrov Martin, 2007, 2007 16th International Conference on Parallel Architectures and Compilation Techniques, P73
[6]
Domas Christopher., 2018, Hardware Backdoors in x86 CPUs
[7]
Duflot Loic., 2006, CANSECWESTCORE06
[8]
Ferraiuolo A, 2017, TWENTY-SECOND INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS (ASPLOS XXII), P555, DOI 10.1145/3037697.3037739
[9]
A Verilog to C compiler
[J].
11TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS,
2000,
:122-127
[10]
SPECUSYM: Speculative Symbolic Execution for Cache Timing Leak Detection
[J].
2020 ACM/IEEE 42ND INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING (ICSE 2020),
2020,
:1235-1247