Study of Multicell Upsets in SRAM at a 5-nm Bulk FinFET Node

被引：5

作者：

Pieper, Nicholas J. J. ^{[1
]}

Xiong, Yoni ^{[1
]}

Feeley, Alexandra ^{[1
]}

Pasternak, John ^{[2
]}

Dodds, Nathaniel ^{[3
]}

Ball, D. R. ^{[1
]}

Bhuva, Bharat L. L. ^{[1
]}

机构：

[1] Vanderbilt Univ, Elect & Comp Engn Dept, Nashville, TN 37212 USA

[2] Synopsys Inc, Mountain View, CA 94043 USA

[3] Sandia Natl Labs, Albuquerque, NM 87123 USA

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2023年 / 70卷 / 04期

关键词：

Neutrons; SRAM cells; Alpha particles; Ions; FinFETs; Transistors; Integrated circuits; Multicell upset (MCU); single event; static random access memory (SRAM); SINGLE EVENT UPSETS; MULTIPLE BIT UPSETS; 90 NM CMOS; SOFT ERRORS; MITIGATION;

D O I：

10.1109/TNS.2023.3240318

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Single-port (SP) and two-port (TP) static random access memory (SRAM) designs in a 5-nm bulk FinFET node were tested for multicell upset (MCU) vulnerability against alpha particles, 14-MeV neutrons, thermal neutrons, and heavy ions with nominal and reduced supply voltages. MCU contributions to single-event upset (SEU) rates and observed bitline (BL) upset ranges are presented for each particle as a function of supply voltage. Results show that MCUs account for a majority of events from high linear energy transfer (LET) particles and neutrons at lower supply voltages. MCU shapes are shown for various sizes of upset clusters.

引用

页码：401 / 409

页数：9

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