Quasi-Flying Gate Concept Used for Short-Circuit Detection on SiC Power MOSFETs Based on a Dual-Port Gate Driver

被引:6
作者
Picot-Digoix, Mathis [1 ]
Richardeau, Frederic [2 ]
Blaquiere, Jean-Marc [2 ]
Vinnac, Sebastien [2 ]
Azzopardi, Stephane [1 ]
Le, Thanh-Long [1 ]
机构
[1] Safran Tech, Paris Saclay, F-78117 Paris Saclay, France
[2] Univ Toulouse III Paul Sabatier UPS, Univ Toulouse, INPT, CNRS,Lab Plasma & Convers Energie LAPLACE, F-31077 Toulouse, France
关键词
Logic gates; MOSFET; Switches; Circuit faults; Silicon carbide; Gate drivers; Couplings; Driver circuits; fault detection; fault protection; gate drivers; gate leakage; power mosfet; power semiconductor devices; reliability engineering; silicon carbide; wide band gap semiconductors;
D O I
10.1109/TPEL.2023.3258640
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The proposed dual-port gate driver architecture relies on a quasi-flying gate concept to protect SiC power mosfets against short-circuit events. Hard switching faults (HSFs) extract charges from the gate by causing a leakage current toward the source, while faults under load (FUL) lead to charge injection into the gate through the reverse transfer capacitance (C-GD). Such phenomena lead to perturbations of the gate-source voltage (V-GS), which are amplified by the gate resistor, acting as an enhancer of short-circuit signatures. Thus, a small gate resistance is used to ensure high switching dynamics, while a larger one is switched on during pulsewidth modulation on-state operation to identify possible faults. A dual-port gate driver is then proposed to ensure fast switching with HSF and FUL monitoring. The fault detection scheme relies on comparing two thresholds to V-GS relative changes to the nominal gate voltage. Experimental results using TO-247 package 1.2-kV/36-A SiC mosfets exhibit promising inverter leg short-circuit detection and protection against faults in less than 300 ns.
引用
收藏
页码:6934 / 6938
页数:5
相关论文
共 15 条
  • [1] The Current Status and Trends of 1,200-V Commercial Silicon-Carbide MOSFETs
    Adan, Alberto O.
    Tanaka, Daisuke
    Burgyan, Lajos
    Kakizaki, Yuji
    [J]. IEEE POWER ELECTRONICS MAGAZINE, 2019, 6 (02): : 36 - 47
  • [2] Awwad Abdullah Eial, 2015, 2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe), P1, DOI 10.1109/EPE.2015.7311701
  • [3] Barazi Y, 2020, PROC INT SYMP POWER, P94, DOI 10.1109/ISPSD46842.2020.9170164
  • [4] Physical Origin of the Gate Current Surge During Short-Circuit Operation of SiC MOSFET
    Boige, F.
    Tremouilles, D.
    Richardeau, F.
    [J]. IEEE ELECTRON DEVICE LETTERS, 2019, 40 (05) : 666 - 669
  • [5] Castellazzi A, 2017, INT RELIAB PHY SYM
  • [6] Towards a safe failure mode under short-circuit operation of power SiC MOSFET using optimal gate source voltage depolarization
    Jouha, Wadia
    Richardeau, Frederic
    Azzopardi, Stephane
    [J]. MICROELECTRONICS RELIABILITY, 2021, 126
  • [7] Theoretical Optimization of the Si GSS-DMM Device in the BaSIC Topology for SiC Power MOSFET Short-Circuit Capability Improvement
    Kanale, Ajit
    Baliga, B. Jayant
    [J]. IEEE ACCESS, 2021, 9 : 70039 - 70047
  • [8] A Novel SiC MOSFET With Embedded Auto-Adjust JFET With Improved Short Circuit Performance
    Li, Xu
    Deng, Xiaochuan
    Li, Xuan
    Xu, Xiaojie
    Wen, Yi
    Wu, Hao
    Chen, Wanjun
    Zhang, Bo
    [J]. IEEE ELECTRON DEVICE LETTERS, 2021, 42 (12) : 1751 - 1754
  • [9] Meiting Cui, 2018, IOP Conference Series: Materials Science and Engineering, V439, DOI 10.1088/1757-899X/439/2/022026
  • [10] Musumeci S, 2002, IEEE IND APPLIC SOC, P2614, DOI 10.1109/IAS.2002.1042816