Thermal and Mechanical characterization of embedded PTCQ packaging test chip die

被引：0
|
作者：
Weis, Gerald [1 ]
Schwarz, Timo [1 ]
Cherman, Vladimir [2 ]
Stahr, Hannes [1 ]
Van der Plas, Geert [2 ]
机构：
[1] AT&S Austria Technol & Syst Tech AG, Leoben, Austria
[2] IMEC, Heverlee, Belgium
来源：
2023 IEEE 73RD ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, ECTC | 2023年
关键词：
embedding of semiconductors; miniaturization; chip-package interaction - CPI; thermal performance; hiding dies; package optimization;
D O I：
10.1109/ECTC51909.2023.00096
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Heterogeneous integration in electronic packages require special attention on the interfaces between different materials. Embedded components utilize free space in isolating materials to integrate functions directly in the center of a substrate. Due to material differences, mechanical forces might apply on the electrical interconnection between the semiconductor and the package. An evaluation of the interface and a comparison to standard components shows that embedding enables further miniaturization and help to outperform traditional packaging technologies for a variety of operating conditions.
引用
收藏
页码：537 / 541
页数：5
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