Performance investigations of five-level reduced switches count H-bridge multilevel inverter

被引:2
作者
Parimalasundar, E. [1 ]
Muthukaruppasamy, S. [2 ]
Dharmaprakash, R. [3 ]
Suresh, K. [4 ]
机构
[1] Mohan Babu Univ, Erstwhile Sree Vidyanikethan Engn Coll, Dept Elect & Elect Engn, Tirupati 517102, AP, India
[2] Anna Univ, Velammal Inst Technol, Elect & Elect Engn, Panchetti 60120, TN, India
[3] Panimalar Engn Coll, Dept Elect & Elect Engn, Chennai 600123, Tamil Nadu, India
[4] Christ, Dept Elect & Elect Engn, Bangalore, Karnataka, India
关键词
H-bridge multilevel inverter; pulse width modulation; switching losses; total harmonic distortion; TOPOLOGIES; SYSTEM;
D O I
10.20998/2074-272X.2023.6.10
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Introduction. This research paper describes a simple five-level single-phase pulse-width modulated inverter topology for photovoltaic grid applications. Multilevel inverters, as opposed to conventional two-level inverters, include more than two levels of voltage while using multiple power switches and lower-level DC voltage levels as input to produce high power, easier, and less modified oscillating voltage. The H-bridge multilevel inverter seems to have a relatively simple circuit design, needs minimal power switching elements, and provides higher efficiency among various types of topologies for multi-level inverters that are presently accessible. Nevertheless, using more than one DC source for more than three voltage levels and switching and conduction losses, which primarily arise in major power switches, continue to be a barrier. The novelty of the proposed work consists of compact modular inverter configuration to connect a photovoltaic system to the grid with fewer switches. Purpose. The proposed system aims to decrease the number of switches, overall harmonic distortions, and power loss. By producing distortion-free sinusoidal output voltage as the level count rises while lowering power losses, the constituted optimizes power quality without the need for passive filters. Methods. The proposed topology is implemented in MATLAB/Simulink with gating pulses and various pulse width modulation technique. Results. With conventional topology, total harmonic distortion, power switches, output voltage, current, power losses, and the number of DC sources are investigated. Practical value. The proposed topology has proven to be extremely useful for deploying photovoltaic-based stand-alone multilevel inverters in grid applications. References 18, table 2, figures 15.
引用
收藏
页码:58 / 62
页数:5
相关论文
共 18 条
[1]   SIMULTANEOUS OPTIMAL INTEGRATION OF PHOTOVOLTAIC DISTRIBUTED GENERATION AND BATTERY ENERGY STORAGE SYSTEM IN ACTIVE DISTRIBUTION NETWORK USING CHAOTIC GREY WOLF OPTIMIZATION [J].
Belbachir, N. ;
Zellagui, M. ;
Settoul, S. ;
El-Bayeh, C. Z. ;
Bekkouche, B. .
ELECTRICAL ENGINEERING & ELECTROMECHANICS, 2021, (03) :52-61
[2]   Reconfigurable Multilevel Inverter With Fault-Tolerant Ability [J].
Jahan, Hossein Khoun ;
Panahandeh, Farhad ;
Abapour, Mehdi ;
Tohidi, Sajjad .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2018, 33 (09) :7880-7893
[3]   High step-up dc/dc converter using switch-capacitor techniques and lower losses for renewable energy applications [J].
Maalandish, Mohammad ;
Hosseini, Seyed Hossein ;
Jalilzadeh, Tohid .
IET POWER ELECTRONICS, 2018, 11 (10) :1718-1729
[4]   Review and Comparison of Step-Up Transformerless Topologies for Photovoltaic AC-Module Application [J].
Meneses, David ;
Blaabjerg, Frede ;
Garcia, Oscar ;
Cobos, Jose A. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2013, 28 (06) :2649-2663
[5]   A Fault-Tolerant Hybrid Cascaded H-Bridge Multilevel Inverter [J].
Mhiesan, Haider ;
Wei, Yuqi ;
Siwakoti, Yam P. ;
Mantooth, H. Alan .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2020, 35 (12) :12702-12715
[6]   Three-Level F-Type Inverter [J].
Odeh, Charles I. ;
Lewicki, Arkadiusz ;
Morawiec, Marcin ;
Kondratenko, Dmytro .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2021, 36 (10) :11265-11275
[7]  
Parimalasundar E, 2023, ELECTR ENG ELECTROME, P47, DOI [10.1007/978-981-99-1745-7_4, 10.20998/2074-272X.2023.4.07]
[8]   Fault diagnosis in a five-level multilevel inverter using an artificial neural network approach [J].
Parimalasundar, E. ;
Kumar, R. Senthil ;
Chandrika, V. S. ;
Suresh, K. .
ELECTRICAL ENGINEERING & ELECTROMECHANICS, 2023, (01) :31-39
[9]  
Parimalasundar E., 2022, 2022 International Conference on Intelligent Innovations in Engineering and Technology (ICIIET), P83, DOI 10.1109/ICIIET55458.2022.9967595
[10]   Performance investigation of modular multilevel inverter topologies for photovoltaic applications with minimal switches [J].
Parimalasundar, E. ;
Kumar, N. M. G. ;
Geetha, P. ;
Suresh, K. .
ELECTRICAL ENGINEERING & ELECTROMECHANICS, 2022, (06) :28-34