A hardware-efficient massive MIMO detector using improved quasi-Newton method

被引:0
作者
Guo, Yifan [1 ,2 ]
Wang, Zhijun [3 ]
Guan, Wu [3 ]
Liang, Liping [3 ]
Qiu, Xin [1 ]
机构
[1] Chinese Acad Sci, Inst Microelect, Beijing 100029, Peoples R China
[2] Univ Chinese Acad Sci, Beijing 100049, Peoples R China
[3] Beijing Univ Posts & Telecommun, Beijing 100876, Peoples R China
关键词
massive MIMO; signal detection; quasi-newton method; VLSI; COMPLEXITY SIGNAL-DETECTION; ARCHITECTURE; ALGORITHM; ITERATION;
D O I
10.1587/elex.20.20230281
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The quasi-newton methods are one of the most effective methods for solving unconstrained optimization problems. This letter provides a hardware-efficient massive multiple-input multiple-output (MIMO) detector using an improved quasi-newton (IQN) method. Due to the similarity in the stepsize calculation of Barzilai-Borwein and limited-memory BFGS, two quasi-newton methods are deeply fused in the proposed IQN algorithm for higher convergence speed. The corresponding efficient detector architecture is also given, in which a dual-track systolic array architecture is employed to diminish the number of required Processing Elements (PE) by nearly half with less computational delay. Furthermore, an approximate divider based on the Goldschmidt method is designed to further reduce hardware overhead. Simulation results show that the proposed IQN algorithm achieves better Bit-Error-Ratio (BER) performance under different antenna configurations, and FPGA implementation results also validate the superiority of the proposed detector in terms of hardware efficiency over the state-of-the-art (SOTA) detectors.
引用
收藏
页数:6
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