SnS/MoS2 van der Waals heterojunction for in-plane ferroelectric field-effect transistors with multibit memory and logic characteristics

被引:9
|
作者
Singh, Prashant [1 ]
Rhee, Dongjoon [2 ]
Baek, Sungpyo [1 ]
Yoo, Hyun Ho [1 ]
Niu, Jingjie [1 ]
Jung, Myeongjin [2 ]
Kang, Joohoon [2 ,3 ,5 ]
Lee, Sungjoo [1 ,4 ,6 ]
机构
[1] Sungkyunkwan Univ SKKU, SKKU Adv Inst Nanotechnol St, Suwon, South Korea
[2] Sungkyunkwan Univ SKKU, Sch Adv Mat Sci & Engn, Suwon, South Korea
[3] SKKU, KIST SKKU Carbon Neutral Res Ctr, Suwon, South Korea
[4] Sungkyunkwan Univ SKKU, Dept Nano Engn, Suwon, South Korea
[5] Sungkyunkwan Univ SKKU, Sch Adv Mat Sci & Engn, Suwon 16419, South Korea
[6] Sungkyunkwan Univ SKKU, SKKU Adv Inst Nanotechnol SAINT, Suwon 440746, South Korea
基金
新加坡国家研究基金会;
关键词
ferroelectrics; field-effect transistors; memory devices; two-dimensional materials; van der Waals heterojunction; SNS;
D O I
10.1002/eom2.12333
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
Ferroelectric two dimensional (2D) materials hold great potential to develop modern miniaturized electronic and memory devices. 2D ferroelectrics exhibiting spontaneous polarization in the out-of-plane direction have been extensively investigated to date, but the loss of their polarization during device operation has been problematic. Although 2D materials with in-plane ferroelectric behavior are more stable against depolarization and thus promising for memory and logic applications, experimental realization of in-plane 2D ferroelectric devices is still scarce. Here, we demonstrate in-plane ferroelectric field effect transistors (FETs) based on a van der Waals heterojunction (vdWHJ), which can perform multibit memory and logic operations. Tin monosulfide (SnS), a 2D material with in-plane ferroelectricity, is partially stacked on top of a semiconducting molybdenum disulfide (MoS2) on a silicon dioxide (SiO2)-coated silicon substrate to fabricate vdWHJ FETs in back-gate configuration. Switching of the in-plane polarization direction in the SnS channel modulates the contact barriers at the electrode/SnS and SnS/MoS2 interfaces, thereby creating high resistance states and low resistance states (LRS). The device exhibits a logic transfer characteristic with a high drain current on/off ratio (> 106) in LRS and non-volatile memory performance with excellent retention characteristics (extrapolated retention time > 10 years). With exquisite tuning of the channel resistance by SnS polarization and gate bias, we realize multiple states with distinct current levels for multibit memory and logic operations suitable for programmable logic-in-memory applications.
引用
收藏
页数:11
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