Exploring the Influence of Material Properties of Epoxy Molding Compound on Wafer Warpage in Fan-Out Wafer-Level Packaging

被引:8
作者
Chuang, Wan-Chun [1 ]
Huang, Yi [1 ]
Chen, Po-En [1 ]
机构
[1] Natl Sun Yat sen Univ, Engn Technol Res & Promot Ctr, Dept Mech & Electromech Engn, Kaohsiung 804, Taiwan
关键词
fan-out wafer-level packaging; warpage; epoxy molding compound; finite element analysis; EXPERIMENTAL-VERIFICATION; SIMULATION; OPTIMIZATION;
D O I
10.3390/ma16093482
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
This study investigated the impact of material properties of epoxy molding compounds on wafer warpage in fan-out wafer-level packaging. As there is currently a lack of comprehensive discussion on the various material property parameters of EMC materials, it is essential to identify the critical influencing factors and quantify the effects of each parameter on wafer warpage. The material properties include Young's modulus of the epoxy molding compound before and after the glass transition temperature (Tg) range of 25-35 degrees C (E-L) and 235-260 degrees C (E-H), coefficient of thermal expansion (a1, a2), and the temperature change ( increment T) between E-L and E-H. Results show that, within the range of extreme values of material properties, E-L and a1 are the critical factors that affect wafer warpage during the decarrier process in fan-out packaging. a1 has a more significant impact on wafer warpage compared with E-L. E-H, a2, Tg, and increment T have little influence on wafer warpage. Additionally, the study identified the optimized material property of the epoxy molding compound that can reduce the maximum wafer warpage in the X and Y directions from initial values of 7.34 mm and 7.189 mm to 0.545 mm and 0.45 mm, respectively, resulting in a reduction of wafer warpage of 92.58% (X direction) and 93.74% (Y direction). Thus, this study proposes an approach for evaluating the impact of material properties of epoxy molding compounds on wafer warpage in fan-out wafer-level packaging. The approach aims to address the issue of excessive wafer warpage due to material variation and to provide criteria for selecting appropriate epoxy molding compounds to enhance process yield in packaging production lines.
引用
收藏
页数:15
相关论文
共 16 条
[1]   Study on Warpage and Reliability of Fan-Out Interposer Technology [J].
Che, Fa Xing ;
Ho, David ;
Chai, Tai Chong .
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2019, 9 (04) :786-796
[2]   Warpage Prediction and Optimization for Embedded Silicon Fan-Out Wafer-Level Packaging Based on an Extended Theoretical Model [J].
Chen, Cheng ;
Yu, Daquan ;
Wang, Teng ;
Xiao, Zhiyi ;
Wan, Lixi .
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2019, 9 (05) :845-853
[3]   Investigation of Warpage for Multi-Die Fan-Out Wafer-Level Packaging Process [J].
Chen, Chuan ;
Su, Meiying ;
Ma, Rui ;
Zhou, Yunyan ;
Li, Jun ;
Cao, Liqiang .
MATERIALS, 2022, 15 (05)
[4]  
Chen HT, 2023, PROCEEDINGS OF THE 28TH ACM INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS, VOL 2, ASPLOS 2023, P1, DOI [10.1145/3575693.3576173, 10.1109/EuroSimE56861.2023.10100786]
[5]   Viscoelastic Warpage Modeling of Fan-Out Wafer-Level Packaging During Wafer-Level Mold Cure Process [J].
Cheng, Hsien-Chie ;
Wu, Zong-Da ;
Liu, Yan-Cheng .
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2020, 10 (07) :1240-1250
[6]   Warpage simulation for the reconstituted wafer used in fan-out wafer level packaging [J].
Chiu, Tz-Cheng ;
Yeh, En-Yu .
MICROELECTRONICS RELIABILITY, 2018, 80 :14-23
[7]  
Hamaguchi K, 2016, 2016 6TH ELECTRONIC SYSTEM-INTEGRATION TECHNOLOGY CONFERENCE (ESTC)
[8]   Experimental Verification and Optimization Analysis of Warpage for Panel-Level Fan-Out Package [J].
Hou, Fengze ;
Lin, Tingyu ;
Cao, Liqiang ;
Liu, Fengman ;
Li, Jun ;
Fan, Xuejun ;
Zhang, G. Q. .
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2017, 7 (10) :1721-1728
[9]   Warpage Measurements and Characterizations of Fan-Out Wafer-Level Packaging With Large Chips and Multiple Redistributed Layers [J].
Lau, John H. ;
Li, Ming ;
Yang, Lei ;
Li, Margie ;
Xu, Iris ;
Chen, Tony ;
Chen, Sandy ;
Yong, Qing Xiang ;
Madhukumar, Janardhanan Pillai ;
Kai, Wu ;
Fan, Nelson ;
Kuah, Eric ;
Li, Zhang ;
Tan, Kim Hwee ;
Bao, Winsons ;
Lim, Sze Pei ;
Beica, Rozalia ;
Ko, Cheng-Ta ;
Xi, Cao .
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2018, 8 (10) :1729-1737
[10]   Simulation methodology development of warpage estimation for epoxy molding compound under considerations of stress relaxation characteristics and curing conditions applied in semiconductor packaging [J].
Lee, Chang-Chun ;
Lee, Chia-Chi ;
Chang, Che-Pei .
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2022, 145