Implementation of digital differentiator and digital integrator using quantum dot cellular automata

Current CMOS (Complementary metal-oxide-semiconductor) technology is no longer constrained in scaling by short channel effects. The semiconductor industry has developed a number of substitute technologies, including quantum-dot cellular automata, to get around these restrictions (QCA). In this study, a novel technique for developing digital differentiators and integrators is presented, employing QCA Technology as a key component. In order to design the digital differentiator focus has been given on no recursive simple tapped delay line differentiator called first difference differentiator and central difference differentiator. Further work has been done on design side of digital integrator. For this, time domain rectangular rule integrator has been realized with the support of QCA. By implementing the QCA, area of integrator circuit is obtained as 0.16 mu m(2) and 0.14 mu m(2) for 2 Bit and 4 Bit integrator circuit, respectively. Area occupied by central Difference differentiator is 0.52 mu m(2), 4 Bit F-D Differentiator occupied 0.53 mu m(2). Power calculation shows that power consumption is less than 6 nW in QCA-based integrator in comparison with CMOS technology. Further, it is observed that QCA-based digital differentiator and integrator have much reduced area compare to CMOS-based differentiator and integrator. These simple circuits can be further used in DSP filters like Cascaded Integrator-Comb (CIC).