High-Frequency Signal Generator Using Cascaded Frequency Multiplier

被引：4

作者：

Tripathi, Girish Chandra ^{[1
]}

Rawat, Meenakshi ^{[2
]}

机构：

[1] Tejas Networks Ltd, Bengaluru 560100, India

[2] Indian Inst Technol Roorkee, Dept Elect & Commun Engn, Roorkee 247667, India

来源：

IEEE ACCESS | 2023年 / 11卷

关键词：

Bandwidth reduction; cascade feed-forward neural networks (CFFNN); digital predistor-tion; error vector magnitude (EVM); frequency quadrupler; millimeter-wave; DIGITAL PREDISTORTION; LINEARIZATION; ANN;

D O I：

10.1109/ACCESS.2023.3295491

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a method for increasing the operating frequency range of a sub-6 GHz transmitter to millimeter wave (mm-wave) using two cascaded frequency doublers. The usage of such a frequency up-conversion approach is constrained since applying the first frequency doubler's generated harmonics to the second doubler for mm-wave signal creation results in severe distortions and bandwidth expansion of the transmitted signal, limiting the use of such frequency up-conversion method. We have proposed a combined gain and phase retarder and physically inspired cascaded feed-forward neural network (CFFNN) based digital predistortion to mitigate the bandwidth expansion and distortions. A comparative study of feed-forward neural networks (FFNN) and CFFNN has been carried out to establish CFFNN as a significant and less complex model for effective DPD of frequency quadrupler. For proof of concept, we have experimentally validated this method for Long-Term Evolution (LTE) 20 MHZ (64-QAM) signal at 24 GHz frequency band using commercially available frequency multipliers. The measurement results show the bandwidth expansion is reduced approximately 11-12 times, and the adjacent channel power ratio (ACPR) of around -45.1 dBc and error vector magnitude (EVM) of approximately 3.07% is achieved.

引用

页码：74559 / 74568

页数：10

共 22 条

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