An Energy-Efficient Neural Network Accelerator With Improved Resilience Against Fault Attacks

被引:1
作者
Maji, Saurav [1 ,2 ]
Lee, Kyungmi [1 ]
Gongye, Cheng [3 ,4 ]
Fei, Yunsi [3 ]
Chandrakasan, Anantha P. [1 ]
机构
[1] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA
[2] Intel Corp, Hillsboro, OR 97124 USA
[3] Northeastern Univ, Dept Elect & Comp Engn, Boston, MA 02115 USA
[4] Nvidia Corp, Santa Clara, CA 95051 USA
关键词
Data authentication; fault attacks (FAs); fault detection; hardware security; neural networks (NNs);
D O I
10.1109/JSSC.2024.3374638
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Embedded neural network (NN) implementations are vulnerable to misclassification under fault attacks (FAs). Clock glitching and injecting strong electromagnetic (EM) pulses are two simple yet detrimental FA techniques that disrupt the NN by: 1) introducing errors in the NN model and 2) corrupting NN computation results. This article introduces the first application-specific integrated circuit (ASIC) demonstration of an energy-efficient NN accelerator equipped with built-in FA detection capabilities. We have integrated lightweight cryptography-based checks for on-chip verification to identify model errors and additionally serve as a fault detection sensor for spotting computational errors. We showcase high error-detection capabilities along with a minimal area overhead of 5.9% and negligible impact on NN accuracy.
引用
收藏
页码:3106 / 3116
页数:11
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