A constant loop bandwidth fractional-N frequency synthesizer for GNSS receivers

被引:3
作者
尹喜珍 [1 ]
肖时茂 [1 ]
金玉花 [2 ]
吴启武 [3 ]
马成炎 [1 ,2 ]
叶甜春 [1 ]
机构
[1] Institute of Microelectronics,Chinese Academy of Sciences,Beijing ,China
[2] Hangzhou Zhongke Microelectronics CoLtd,Hangzhou ,China
[3] Department of Communication Engineering,Engineering University of Armed Police Force,Xi'an ,China
关键词
constant loop bandwidth; GNSS; frequency synthesizer; VCO;
D O I
暂无
中图分类号
TN965.5 [接收设备]; TN74 [频率合成技术、频率合成器];
学科分类号
080401 ; 081105 ; 0825 ; 080902 ;
摘要
<正>A constant loop bandwidth fractional-TV frequency synthesizer for portable civilian global navigation satellite system(GNSS) receivers implemented in a 130 nm 1P6M CMOS process is introduced.Via discrete working regions,the LC-VCO obtains a wide tuning range with a simple structure and small VCO gain.Spur suppression technology is proposed to minimize the phase offset introduced by PFD and charge pumps.The optimized bandwidth is maintained by an auto loop calibration module to adjust the charge pump current when the PLL output frequency changes or the temperature varies.Measurement results show that this synthesizer attains an in-band phase noise lower than -93 dBc at a 10 kHz offset and a spur less than -70 dBc;the bandwidth varies by±3%for all the GNSS signals.The whole synthesizer consumes 4.5 mA current from a 1 V supply,and its area(without the LO tested buffer) is 0.5 mm2.
引用
收藏
页码:117 / 123
页数:7
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Design of Analog CMOS Integrated Circuits .2 Razavi Behzad. McGraw-Hill . 2001