Analysis and optimization of current sensing circuit for deep sub-micron SRAM

被引：0

作者：

王一奇 ^{[1
]}

赵发展 ^{[1
]}

刘梦新 ^{[1
]}

吕荫学 ^{[1
]}

赵博华 ^{[1
]}

韩郑生 ^{[1
]}

机构：

[1] Institute of Microelectronics,Chinese Academy of Sciences

来源：

半导体学报 | 2011年 / 32卷 / 11期

关键词：

current sensing; mismatch; yield and speed optimization;

D O I：

暂无

中图分类号：

TP333.1 [内存贮器（主存贮器）总论]; TN406 [可靠性及例行试验];

学科分类号：

080903 ; 081201 ; 1401 ;

摘要：

A quantitative yield analysis of a traditional current sensing circuit considering the random dopant fluctuation effect is presented.It investigates the impact of transistor size,falling time of control signal CS and threshold voltage of critical transistors on failure probability of current sensing circuit.On this basis,we present a final optimization to improve the reliability of current sense amplifier.Under 90 nm process,simulation shows that failure probability of current sensing circuit can be reduced by 80%after optimization compared with the normal situation and the delay time only increases marginally.

引用

页码：157 / 161

页数：5

共 13 条

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澳大利亚专利 :AU555130B2 ,1986-09-11

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