Parallel architecture and optimization for discrete-event simulation of spike neural networks

被引：0

作者：

TANG YuHua ^{[1
,2
]}

ZHANG BaiDa ^{[2
,1
]}

WU JunJie ^{[2
,1
]}

HU TianJiang ^{[3
]}

ZHOU Jing ^{[2
,1
]}

LIU FuDong ^{[2
,1
]}

机构：

[1] Department of Computer Science and Technology,School of Computer,National University of Defense Technology

[2] State Key Laboratory of High Performance Computing,National University of Defense Technology

[3] College of Mechatronic Engineering and Automation,National University of Defense Technology

来源：

Science China(Technological Sciences) | 2013年 / 02期

关键词：

spike neural network; discrete event simulation; intelligent parallelization framework;

D O I：

暂无

中图分类号：

TP338.6 [并行计算机]; TP183 [人工神经网络与计算];

学科分类号：

081201 ; 081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Spike neural networks are inspired by animal brains,and outperform traditional neural networks on complicated tasks.However,spike neural networks are usually used on a large scale,and they cannot be computed on commercial,off-the-shelf computers.A parallel architecture is proposed and developed for discrete-event simulations of spike neural networks.Furthermore,mechanisms for both parallelism degree estimation and dynamic load balance are emphasized with theoretical and computational analysis.Simulation results show the effectiveness of the proposed parallelized spike neural network system and its corresponding support components.

引用

页码：509 / 517

页数：9

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