Implementing kinematics computation in FPGA co-processor for a 6-DOF space manipulator

被引:0
作者
郑一力 [1 ]
机构
[1] School of Automation,Beijing University of Posts and Telecommunications
关键词
Space manipulator; coordinate rotation digital computer (CORDIC); kinematics; field programmable gate array (FPGA);
D O I
暂无
中图分类号
TP241 [机械手];
学科分类号
080202 ; 1405 ;
摘要
Based on the coordinate rotation digital computer(CORDIC)algorithm,the high-speed kinematicscalculation for a six degree of freedom(DOF)space manipulator is implemented in a field programmablegate array(FPGA)co-processor.A pipeline architecture is adopted to reduce the complexity and time-consumption of the kinematics calculation .The CORDIC soft-core and the CORDIC-based pipelined kine-matics calculation co-processor are described with the very-high-speed integrated circuit hardware descrip-tion language(VHDL)language and realized in the FPGA .Finally,the feasibility of the design is vali-dated in the Spartan-3 FPGA of Xilinx Inc.,and the performance specifications of FPGA co-processor arediscussed.The results show that time-consumption of the kinematics calculation is greatly reduced.
引用
收藏
页码:250 / 254
页数:5
相关论文
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  • [1] A unified algorithm for elementary functions .2 Walther J S. Proceedings of Spring Joint Computer Conference . 1971