Research on Column FPN and Black Level Calibration in Large Array CMOS Image Sensor

A technical investigation, research and implementation is presented to correct column fixed pattern noise and black level in large array Complementary metal oxide semiconductor(CMOS) image sensor. Through making a comparison among reported solution, and give large array CMOS image sensor design and considerations,according to our previous analysis on non-ideal factor and error source of piecewise Digital to analog converter(DAC) in multi-channels, an improving accurate piecewise DAC with adaptive switch technique is developed. The research theory has verified by a high dynamic range and low column Fixed pattern noise(FPN) CMOS image sensor prototype chip, which consisting of 8320×8320 pixel array was designed and fabricated in 55 nm CMOS 1P4M standard process. The chip active area is 48 mm×48 mm with a pixel size of 5.7μm×5.7μm. The measured results achieved a high intrinsic dynamic range of 75 d B, a low FPN and black level of 0.06%, a low photo response non-uniformity of 1.5% respectively, and an excellent raw sample image taken by the prototype sensor.