A 0.7–7 GHz wideband reconfigurable receiver RF front-end in CMOS

被引：0
|
作者：
Youming Zhang [1 ]
Lijuan Yang [1 ]
Fengyi Huang [1 ,2 ]
Nan Jiang [2 ]
Xuegang Zhang [1 ]
机构：
[1] Institute of RF- & OE-ICs, School of Information Science and Engineering, Southeast University
[2] S-TEK (Shanghai) High-Frequency Communication Technology Co. Ltd.
来源：
Journal of Semiconductors | 2018年 / 08期
关键词：
wideband LNA; resistive-feedback; CMOS; passive mixer;
D O I：
暂无
中图分类号：
TN386 [场效应器件]; TN722.3 [低噪声放大器];
学科分类号：
0805 ; 080501 ; 080502 ; 080902 ; 080903 ;
摘要：
A 0.7–7 GHz wideband RF receiver front-end So C is designed using the CMOS process. The front-end is composed of two main blocks: a single-ended wideband low noise amplifier（LNA） and an in-phase/quadrature（I/Q） voltage-driven passive mixer with IF amplifiers. Based on a self-biased resistive negative feedback topology,the LNA adopts shunt-peaking inductors and a gate inductor to boost the bandwidth. The passive down-conversion mixer includes two parts: passive switches and IF amplifiers. The measurement results show that the frontend works well at different LO frequencies, and this chip is reconfigurable among 0.7 to 7 GHz by tuning the LO frequency. The measured results under 2.5-GHz LO frequency show that the front-end SoC achieves a maximum conversion gain of 26 dB, a minimum noise figure（NF） of 3.2 dB, with an IF bandwidth of greater than 500 MHz.The chip area is 1.67 × 1.08 mm;.
引用
收藏
页码：81 / 84
页数：4
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