A semi-empirical analytic model for threshold voltage instability in MOSFETs with high-k gate stacks

被引：0
|
作者：
何进 [1 ,2 ]
马晨月 [2 ]
张立宁 [2 ]
张健 [2 ]
张兴 [2 ]
机构：
[1] School of Computer & Information Engineering,Shenzhen Graduate School,Peking University
[2] EECS,School of Electronic Engineering and Computer Science,Peking University
来源：
半导体学报 | 2009年 / 30卷 / 08期
基金：
中国国家自然科学基金;
关键词：
high-k gate stack; nanoscale MOSFETs; interface trap and charges; trapping and detrapping; threshold voltage dynamic behavior; compact modeling;
D O I：
暂无
中图分类号：
TN386 [场效应器件];
学科分类号：
0805 ; 080501 ; 080502 ; 080903 ;
摘要：
A semi-empirical analytic model for the threshold voltage instability of a MOSFET is derived from Shockley-Read-Hall (SRH) statistics to account for the transient charging effects in a MOSFET high-k gate stack. Starting from the single energy level and single trap assumption, an analytical expression for the filled trap density in terms of dynamic time is derived from SRH statistics. The semi-empirical analytic model for the threshold voltage instability is developed based on MOSFET device physics between the threshold voltage and the induced trap density. The obtained model is also verified by extensive experimental data of trapping and de-trapping stress from different high-k gate configurations.
引用
收藏
页码：63 / 66
页数：4
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