共 8 条
[1]
A Modeling Approach for Fractional-NFrequency Synthesizers Allowing Straightforward Noise Analysis. M.H. Perrott,M.D. Trott. IEEE Journal of Solid State Circuits . 2002
[2]
A 1mW Current-Reuse CMOS Differential LC-VCO with Low Phase Noise. Seok-Ju Yun,So-Bong Shin,Hyung-Chul Choi,Sang-Gug Lee. ISSCC 2005/SESSION 29/RF TECHNIQUES/ .
[3]
A CMOS triple-band fractional-N frequency syn- thesizer for GSM/GPRS/EDGE applications. Wu P,He K. International Symposium on Circuits and Systems . 2001
[4]
A fully integrated dual-mode frequency synthesizer for GSM and wideband CDMA in 0.5 μmCMOS. Tang Y,Aktas A,Ismail M, et al. IEEE Circuits and Systems Magazine . 2001
[5]
A family of lowpower truly modular programmable dividers in standard 0. 35 m CMOS Tech. Vaucher C S,Ferencic I,Locher M,et al. IEEE Journal of Solid State Circuits . 2000
[6]
A40-GHz fre-quency divider in90-nm CMOS technology. USAMA M,,KWASNIEWSKI T A. IEEE North-East Workshop on Circuits and Systems . 2006
[7]
Design of high-performance CMOS charge pump in phase-locked loops. Rhee W. International Symposium on Circuits and Systems . 1999
[8]
A filtering technique to lower LC oscillator phase noise. Hegazi E,Sjoland H,Abidi A A. IEEE Journal of Solid State Circuits . 2001