A Novel Reconfigurable Data-Flow Architecture for Real Time Video Processing

被引：0
|
作者：
刘镇弢 [1 ]
李涛 [2 ]
韩俊刚 [2 ]
机构：
[1] School of Microelectronics, Xidian University
[2] School of Electronic Engineering, Xi'an University of Posts and Telecommunications
来源：
JournalofShanghaiJiaotongUniversity(Science) | 2013年 / 18卷 / 03期
基金：
中国国家自然科学基金;
关键词：
dynamically reconfigurable architecture; data-flow; video stream processing; augmented finite state machine;
D O I：
暂无
中图分类号：
TP391.41 [];
学科分类号：
080203 ;
摘要：
This paper describes a dynamically reconfigurable data-flow hardware architecture optimized for the computation of image and video. It is a scalable hierarchically organized parallel architecture that consists of data-flow clusters and finite-state machine (FSM) controllers. Each cluster contains various kinds of cells that are optimized for video processing. Furthermore, to facilitate the design process, we provide a C-like language for design specification and associated design tools. Some video applications have been implemented in the architecture to demonstrate the applicability and flexibility of the architecture. Experimental results show that the architecture, along with its video applications, can be used in many real-time video processing.
引用
收藏
页码：348 / 359
页数：12
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