Partial-SOI high voltage P-channel LDMOS with interface accumulation holes

被引:0
作者
吴丽娟 [1 ,2 ]
胡盛东 [3 ]
罗小蓉 [1 ]
张波 [1 ]
李肇基 [1 ]
机构
[1] State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China
[2] College of Communication Engineering, Chengdu University of Information Technology
[3] College of Communication Engineering, Chongqing University
基金
中国国家自然科学基金;
关键词
interface charges; breakdown voltage; partial-SOI; accumulation holes; self-heating effect;
D O I
暂无
中图分类号
TN386.1 [金属-氧化物-半导体(MOS)器件];
学科分类号
0805 ; 080501 ; 080502 ; 080903 ;
摘要
A new partial SOI (silion-on-insulator) (PSOI) high voltage P-channel LDMOS (lateral double-diffused metal-oxide semiconductor) with an interface hole islands (HI) layer is proposed and its breakdown characteristics are investigated theoretically. A high concentration of charges accumulate on the interface, whose density changes with the negative drain voltage, which increase the electric field (E I ) in the dielectric buried oxide layer (BOX) and modulate the electric field in drift region . This results in the enhancement of the breakdown voltage (BV). The values of E I and BV of an HI PSOI with a 2-μm thick SOI layer over a 1-μm thick buried layer are 580V/μm and 582 V, respectively, compared with 81.5 V/μm and 123 V of a conventional PSOI. Furthermore, the Si window also alleviates the self-heating effect (SHE). Moreover, in comparison with the conventional device, the proposed device exhibits low on-resistance.
引用
收藏
页码:373 / 378
页数:6
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