A physical channel-potential and drain-current model for asymmetric dual-gate a-IGZO TFTs

被引：0

作者：

Minxi CAI ^{[1
]}

Ruohe YAO ^{[1
]}

机构：

[1] School of Electronic and Information Engineering, South China University of Technology

来源：

ScienceChina(InformationSciences) | 2019年 / 62卷 / 06期

基金：

中国国家自然科学基金;

关键词：

A physical channel-potential and drain-current model for asymmetric dual-gate a-IGZO TFTs;

D O I：

暂无

中图分类号：

TN321.5 [];

学科分类号：

0805 ; 080501 ; 080502 ; 080903 ;

摘要：

Dear editor,A dual-gate (DG) structure demonstrably has improved the device performance and stability of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs), making circuits faster, less powerconsuming, and more stable [1–3]. Physical device modeling has thus generated much interest in circuit design. Ref.[4] derived simple equations

引用

页码：180 / 182

页数：3

共 48 条

[1] A physical channel-potential and drain-current model for asymmetric dual-gate a-IGZO TFTs
Cai, Minxi
Yao, Ruohe
SCIENCE CHINA-INFORMATION SCIENCES, 2019, 62 (06)
[2] A physical channel-potential and drain-current model for asymmetric dual-gate a-IGZO TFTs
Minxi Cai
Ruohe Yao
Science China Information Sciences, 2019, 62
[3] TCAD Simulation of Dual-Gate a-IGZO TFTs With Source and Drain Offsets
Billah, Mohammad Masum
Hasan, Md Mehedi
Chun, Minkyu
Jang, Jin
IEEE ELECTRON DEVICE LETTERS, 2016, 37 (11) : 1442 - 1445
[4] Boosted Gain of the Differential Amplifier Using the Second Gate of the Dual-Gate a-IGZO TFTs
Tai, Y. -H.
Chiu, H. -L.
Chou, L. -S.
Chang, C. -H.
IEEE ELECTRON DEVICE LETTERS, 2012, 33 (12) : 1729 - 1731
[5] Reduced Mechanical Strain in Bendable a-IGZO TFTs Under Dual-Gate Driving
Billah, Mohammad Masum
Han, Ji-Ung
Hasan, Md Mehedi
Jang, Jin
IEEE ELECTRON DEVICE LETTERS, 2018, 39 (06) : 835 - 838
[6] Reduction of Negative Bias and Light Instability of a-IGZO TFTs by Dual-Gate Driving
Hong, Sejin
Lee, Suhui
Mativenga, Mallory
Jang, Jin
IEEE ELECTRON DEVICE LETTERS, 2014, 35 (01) : 93 - 95
[7] High-Current-Drive Dual-Gate a-IGZO TFT With Nanometer Dotlike Doping
Liao, Chun-Hung
Li, Chang-Hung
Zan, Hsiao-Wen
Meng, Hsin-Fei
Tsai, Chuang-Chuang
IEEE ELECTRON DEVICE LETTERS, 2013, 34 (10) : 1274 - 1276
[8] Poly-Si TFTs with asymmetric dual-gate for kink current reduction
Lee, MC
Han, MK
IEEE ELECTRON DEVICE LETTERS, 2004, 25 (01) : 25 - 27
[9] Full-Swing Clock Generating Circuits on Plastic Using a-IGZO Dual-Gate TFTs With Pseudo-CMOS and Bootstrapping
Chen, Yuanfeng
Geng, Di
Lin, Tengda
Mativenga, Mallory
Jang, Jin
IEEE ELECTRON DEVICE LETTERS, 2016, 37 (07) : 882 - 885
[10] Physical parameters based analytical I-V model of long and short channel a-IGZO TFTs
Sharma, Ashima
Bahubalindruni, Pydi Ganga
Bharti, Manisha
Barquinha, Pedro
SOLID-STATE ELECTRONICS, 2022, 192

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