A novel ESD power supply clamp circuit with double pull-down paths

被引：0

作者：

LIU HongXia ^{[1
]}

YANG ZhaoNian ^{[1
]}

LI Li ^{[1
]}

ZHUO QingQing ^{[1
]}

机构：

[1] Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices,School of Microelectronics, Xidian University

来源：

Science China(Information Sciences) | 2013年 / 56卷 / 10期

基金：

中国国家自然科学基金;

关键词：

ESD(electrostatic-discharge); clamp circuit; duration; false triggering; power supply noise;

D O I：

暂无

中图分类号：

TN386 [场效应器件];

学科分类号：

0805 ; 080501 ; 080502 ; 080903 ;

摘要：

Electrostatic-discharge(ESD)protection design is one of the key challenges of advanced CMOS processes.RC-triggered and MOSFET-based power supply ESD clamp circuits have been widely used to obtain the desired ESD protection ability.In this paper,a MOSFET-based ESD power clamp circuit with only10 ns RC time constant for 0.18-μm process is presented.A double pull-down path is proposed to avoid false triggering,reject power supply noise and reduce energy consumption.The performance of the novel clamp circuit is excellent,consuming very small layout area.The simulation results show that this clamp circuit can be used in industry.

引用

页码：172 / 179

页数：8