ICEPOLE: High-speed, hardware-oriented authenticated encryption

被引：13

作者：

Morawiecki, Pawel ^{[1
,2
]}

Gaj, Kris ^{[5
]}

Homsirikamol, Ekawat ^{[5
]}

Matusiewicz, Krystian ^{[8
]}

Pieprzyk, Josef ^{[3
,4
]}

Rogawski, Marcin ^{[7
]}

Srebrny, Marian ^{[1
,2
]}

Wójcik, Marcin ^{[6
]}

机构：

[1] Institute of Computer Science, Polish Academy of Sciences, Poland

[2] Section of Informatics, University of Commerce, Kielce, Poland

[3] Department of Computing, Macquarie University, Australia

[4] Electrical Engineering and Computer Science School, Queensland University of Technology, Brisbane, Australia

[5] Cryptographic Engineering Research Group, George Mason University, United States

[6] Cryptography and Information Security Group, University of Bristol, United Kingdom

[7] Cadence Design Systems, San Jose, United States

[8] Intel, Gdańsk, Poland

来源：

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | 2014年 / 8731卷

关键词：

Authentication - Cryptography - Iterative methods - Ice;

D O I：

10.1007/978-3-662-44709-3_22

中图分类号：

学科分类号：

摘要：

This paper introduces our dedicated authenticated encryption scheme ICEPOLE. ICEPOLE is a high-speed hardware-oriented scheme, suitable for high-throughput network nodes or generally any environment where specialized hardware (such as FPGAs or ASICs) can be used to provide high data processing rates. ICEPOLE-128 (the primary ICEPOLE variant) is very fast. On the modern FPGA device Virtex 6, a basic iterative architecture of ICEPOLE reaches 41 Gbits/s, which is over 10 times faster than the equivalent implementation of AES-128-GCM. The throughput-to-area ratio is also substantially better when compared to AES-128-GCM. We have carefully examined the security of the algorithm through a range of cryptanalytic techniques and our findings indicate that ICEPOLE offers high security level. © International Association for Cryptologic Research 2014.

引用

页码：392 / 413