Tunable Voltage Reference circuit in a standard 65nm CMOS technology

被引：0

作者：

Ondica, Robert ^{[1
]}

Maljar, David ^{[1
]}

Potocny, Miroslav ^{[1
]}

Arbet, Daniel ^{[1
]}

Stopjakova, Viera ^{[1
]}

机构：

[1] Slovak Univ Technol Bratislava, Inst Elect & Photon, Bratislava, Slovakia

来源：

2025 IEEE 28TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, DDECS | 2025年

关键词：

Voltage Reference; Tunable Amplifier; CMOS; Relaxation Oscillator;

D O I：

10.1109/DDECS63720.2025.11006809

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper presents tunable voltage reference (TVR) designed in a standard general purpose 65nm CMOS technology. Designed circuit is based on two-transistor (2T) voltage reference (VR) with digitally controlled operational amplifier (OPAMP). Developed TVR provides stable output voltage from 0.38 V to 1.1 V with non-linear tuning step under 0.5% of the output voltage (from 1.9 mV to 2.9 mV). The supply voltage in the range from 0.91 V to 1.5 V is used. The circuit offers parameter PSRR = -53.59 dB (at 1 kHz) and line regulation (LNR) of 0.35% in the worst case. The required area is 0.0185 mm(2). The proposed TVR was used to precise frequency tuning of oscillator. Provided results are obtained from both simulations and measurement of the manufactured ASIC prototype.

引用

页码：80 / 85

页数：6

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