Investigating Transactional Memory for High Performance Embedded Systems

被引：4

作者：

Piatka, Christian ^{[1
]}

Amslinger, Rico ^{[1
]}

Haas, Florian ^{[1
]}

Weis, Sebastian ^{[2
]}

Altmeyer, Sebastian ^{[1
]}

Ungerer, Theo ^{[1
]}

机构：

[1] Univ Augsburg, Univ Str 2, D-86159 Augsburg, Germany

[2] TTTech Auto Germany GmbH, Emmy Noether Ring 16, D-85716 Unterschleissheim, Germany

来源：

ARCHITECTURE OF COMPUTING SYSTEMS, ARCS 2020 | 2020年 / 12155卷

关键词：

Transactional memory; Contention management; Unbounded transactions; Embedded systems;

D O I：

10.1007/978-3-030-52794-5_8

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present a Transaction Management Unit (TMU) for Hardware Transactional Memories (HTMs). Our TMU enables three different contention management strategies, which can be applied according to the workload. Additionally, the TMU enables unbounded transactions in terms of size. Our approach tackles two challenges of traditional HTMs: (1) potentially high abort rates, (2) missing support for unbounded transactions. By enhancing a simulator with a transactional memory and our TMU, we demonstrate that our TMU achieves speedups of up to 4.2 and reduces abort rates by a factor of up to 11.6 for some of the STAMP benchmarks.

引用

页码：97 / 108

页数：12

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