A 28-GHz-Band Efficient Linear Power Amplifier With Novel Adaptive Bias Circuit for 5G Mobile Communications in 56-nm CMOS SOI

被引:1
作者
Fang, Mengchu [1 ]
Sugiura, Tsuyoshi [2 ]
Yoshimasu, Toshihiko [1 ,2 ]
机构
[1] Waseda Univ, Grad Sch Informat Prod & Syst, Kitakyushu, Fukuoka, Japan
[2] Waseda Univ, Grad Sch Fundamental Sci & Engn, Shinjyuku Ku, Tokyo, Japan
来源
2020 IEEE MTT-S INTERNATIONAL WIRELESS SYMPOSIUM, IWS | 2020年
关键词
power amplifier; high efficiency; high linearity; adaptive bias; CMOS SOI;
D O I
10.1109/IWS49314.2020.9360109
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper presents a 28-GHz-band high efficiency linear power amplifier in 56-nm CMOS SOI for 5G mobile communication systems. A novel adaptive bias circuit is proposed to attain high linearity and efficiency simultaneously. In addition, a source degeneration inductor is utilized to improve the gain linearity of the power amplifier. It is expected that the power amplifier exhibits a P1dB of 20 dBm with a linear power gain of 13.2 dB and a peak PAE of 41.4% at a supply voltage of 3.6 V.
引用
收藏
页数:3
相关论文
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Chen C., 2019, GHz-band Stacked FET Linear Power Amplifier IC with 36.2 % PAE at 3-dB back-off from P1dB in 56-nm SOI CMOS
[2]  
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