Analyzing Shared Cache Partitioning on an NXP P4080 Processor as a Method of Multi-Core Interference Mitigation

被引：0

作者：

Ross, John ^{[1
]}

Vance, William ^{[2
]}

Ashok, Roshini ^{[3
]}

Jacobs, Bruce ^{[3
]}

Bui, Tuan ^{[1
]}

Wotell, Mark ^{[4
]}

机构：

[1] DEVCOM AvMC, AvMC MCP LAB, Huntsville, AL USA

[2] TriVector Serv Inc, Huntsville, AL USA

[3] Brockwell Technol Inc, Huntsville, AL USA

[4] Intrepid LLC, Huntsville, AL USA

来源：

2024 AIAA DATC/IEEE 43RD DIGITAL AVIONICS SYSTEMS CONFERENCE, DASC | 2024年

关键词：

Cache; Cache Partitioning; Multi-core; MCP; Interference; Mitigation; P4080; VxWorks; Shared Cache; Safety Critical; Airworthiness; RTOS;

D O I：

10.1109/DASC62030.2024.10748905

中图分类号：

V [航空、航天];

学科分类号：

08 ; 0825 ;

摘要：

This paper focuses on testing and analyzing the different configurations for cache partitioning and determining how effective they are in the robust development of safety critical applications such as airworthiness applications. It also creates an experimental framework in which the system performance, stability, and determinism are all tested and measured through a series of multiple cache partitioning configurations using software and hardware metric tests with the results recorded for analysis. It aims to provide a methodology for when cache partitioning creates an advantage or disadvantage to the system based on the user's needs and development goals.

引用

页数：5

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2023 IEEE/AIAA 42ND DIGITAL AVIONICS SYSTEMS CONFERENCE, DASC, 2023,

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