Asynchronous Circuit Designs for the Internet of Everything: A Methodology for Ultralow-Power Circuits with GALS Architecture

被引：16

作者：

Beigné E. ^{[1
]}

Vivet P. ^{[1
]}

Thonnart Y. ^{[1
]}

Christmann J.-F. ^{[1
]}

Clermidy F. ^{[1
]}

机构：

[1] Minatec Campus, CEA, LETI, Grenoble

来源：

IEEE Solid-State Circuits Magazine | 2016年 / 8卷 / 04期

关键词：

Integrated circuit manufacture - Low power electronics - Internet of Everything - Energy gap;

D O I：

10.1109/MSSC.2016.2573864

中图分类号：

学科分类号：

摘要：

Asynchronous circuits have characteristics that differ significantly from those of synchronous circuits in terms of their power and robustness to variations. In this article, we show how it is possible to exploit these characteristics to design robust ultralow-power circuits within the scope of the Internet of Everything (IoE) and with globally asynchronous and locally synchronous (GALS) architectures. More specifically, our aim is to describe the fundamentals of asynchronous circuit design; to detail specific methodologies with practical examples of low-power, asynchronous circuits; and to offer clear guidelines that differentiate the usefulness of an asynchronous circuit compared to a synchronous one according to different application needs. © 2016 IEEE.

引用

页码：39 / 47

页数：8

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