Low Resistance Cu Vias for 24nm Pitch and Beyond

被引：6

作者：

van der Veen, Marleen H. ^{[1
]}

Pedreira, O. Varela ^{[1
]}

Jourdan, N. ^{[1
]}

Park, S. ^{[1
]}

Struyf, H. ^{[1
]}

Tokei, Zs. ^{[1
]}

Cerantes, C. Leal ^{[2
]}

Chen, F. ^{[2
]}

Xie, X. ^{[2
]}

Wu, Z. ^{[2
]}

Jansen, A. ^{[2
]}

Machillot, J. ^{[3
]}

Cockburn, A. ^{[3
]}

机构：

[1] IMEC, Kapeldreef 75, Leuven, Belgium

[2] Appl Mat Inc, Sunnyvale, CA USA

[3] Appl Mat Belgium, Kapeldreef 75, Leuven, Belgium

来源：

2022 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, IITC | 2022年

关键词：

copper; selective; interconnects; via; barrierless;

D O I：

10.1109/IITC52079.2022.9881285

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this work we evaluate low via resistance options in 21 - 24nm pitch structures by comparing Ru, W versus Cu. A bottom barrierless Cu DD metallization is created using a selective TaN deposition. In MP24, this selective barrier Cu metallization system shows up to a 20% via resistance reduction as compared to conventional Cu DD fill with 1.5nm TaN barrier. The via resistance evaluation of the selective barrier Cu in MP21 shows that the system can be an option for further extension of Cu interconnects while keeping the resistance under control. The line and chain resistance comparison towards barrierless DD Ru shows that the SB Cu metallization is competitive in terms of performance and therefore the preferred way forward for MP24 DD structures.

引用

页码：129 / 131

页数：3

共 8 条

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