Hardware Acceleration of Capsule Networks for Real-time Applications

被引:0
作者
Hemmati, Maryam [1 ]
Babette, Earlene Starling [1 ]
Shan, Julia [1 ]
Biglari-Abhari, Morteza [1 ]
Niar, Smail [2 ,3 ]
机构
[1] Univ Auckland, Dept Elect Comp & Software Engn, Auckland, New Zealand
[2] Univ Polytech Hauts de France, CNRS, LAMIH, Valenciennes, France
[3] Univ Polytech Hauts de France, INSA Hauts de France, Valenciennes, France
来源
2024 27TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, DSD 2024 | 2024年
关键词
Capsule Network; Real-time Application; Hardware Accelerator; FPGA;
D O I
10.1109/DSD64264.2024.00012
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Capsule networks (CapsNet) are a category of deep learning neural networks (DNN) that address one of the main issues and deficiencies of convolutional neural networks (CNN); loss of spatial information in pooling layers. However, the main concern with CapsNets is their compute-intensive nature, which is mainly related to the vector-based calculations during dynamic routing and acts as a barrier for their deployment in real-time applications. To address the specific computing requirements of dynamic routing in capsule layers of CapsNets, we develop a hardware accelerator for dynamic routing using Vitis HLS. In this paper, we present a hardware acceleration solution for capsule networks by integrating AMD Xilinx deep processing unit (DPU) and a custom accelerator for the capsule layer. Our results show significant improvement in throughput compared with the baseline implementation when CapsNet is implemented on Zynq UltraScale+ MPSoC ZCU102 using Vitis AI DPUs.
引用
收藏
页码:19 / 25
页数:7
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