A NOVEL REAL-TIME DEVS SIMULATION ARCHITECTURE WITH HARDWARE-IN-THE-LOOP CAPABILITIES

被引:0
作者
Fernandez-Sebastian, Oscar [1 ]
Cardenas, Roman [2 ,3 ]
Arroba, Patricia [2 ,3 ]
Risco-Martina, Jose L. [1 ]
机构
[1] Univ Complutense Madrid, Dept Comp Architecture & Automat, Madrid, Spain
[2] Univ Politecn Madrid, Dept Elect Engn, Madrid, Spain
[3] Univ Politecn Madrid, Ctr Computat Simulat, Madrid, Spain
来源
2024 ANNUAL MODELING AND SIMULATION CONFERENCE, ANNSIM 2024 | 2024年
关键词
DEVS; Real-Time; Hardware-In-the-Loop;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Advanced Modelling and Simulation (M&S) techniques, including Digital Twins (DTs) and Hardware-In-the-Loop (HIL) simulation, are essential for the design and operation of today's complex systems. Despite these advances, there remains a gap between the simulation methods used in design and those used in implementation. This paper introduces a Real-Time (RT) simulation framework that connects models using the Discrete-Event System Specification (DEVS) with external systems, improving implementation and operation. The Python xDEVS tool has been enhanced to introduce a new suite of real-time simulation components and a DEVS-based communication interface, facilitating adaptable communication protocols. The framework demonstrates its capability to integrate both DEVS and non-DEVS systems and establish effective communication through various experiments, ranging from RT simulation of DEVS models to complex multi-component systems. This tool has significant potential in supporting real and incremental system implementations through HIL techniques, making a valuable contribution to complex system design and operation.
引用
收藏
页数:13
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