Invited: Physical Design for Advanced 3D ICs: Challenges and Solutions

被引:0
作者
Zhao, Yuxuan [1 ]
Zou, Lancheng [1 ]
Yu, Bei [1 ]
机构
[1] Chinese Univ Hong Kong, Hong Kong, Peoples R China
来源
PROCEEDINGS OF THE 2025 INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN, ISPD 2025 | 2025年
关键词
3D ICs; Physical Design; Partitioning; Power Delivery; Placement; Clock Delivery; Routing; POWER DELIVERY DESIGN; THROUGH-SILICON; INTEGRATED-CIRCUITS; TSV; PLACEMENT;
D O I
10.1145/3698364.3709127
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
As technology scaling predicted by Moore's law slows down, 3D integrated circuits (3D ICs) have emerged as a promising alternative to enhance performance while maintaining cost-effectiveness. With the advancement of fabrication and bonding technologies, wafer-level 3D integration enables fine-grain 3D interconnects that maximize the benefits in power, performance, and area (PPA). However, a multitude of challenges have obstructed traditional electronic design automation (EDA) methodologies for 3D IC implementations. This paper surveys the major challenges in the physical design of advanced 3D ICs. We provide a comprehensive review of existing solutions, analyzing their advantages and disadvantages in depth. Finally, we discuss open problems and research opportunities in the development of native 3D EDA tools.
引用
收藏
页码:209 / 216
页数:8
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