A Logic Circuit-Based Intrusion Detection System Using a Dendritic Neural Model Ensemble

被引:0
作者
Ji, Junkai [1 ]
Jin, Haochang [1 ]
Zhao, Jiajun [1 ]
Lin, Qiuzhen [1 ]
Li, Jianqiang [1 ]
Zhu, Zexuan [1 ]
机构
[1] Shenzhen Univ, Shenzhen 518060, Peoples R China
基金
中国国家自然科学基金;
关键词
Accuracy; Computational modeling; Intrusion detection; Computer architecture; Logic gates; Throughput; Shift registers; Logic; Integrated circuit modeling; Field programmable gate arrays; DEEP LEARNING APPROACH; RANDOM FOREST; NETWORK; CLASSIFICATION; TREE;
D O I
10.1109/MCI.2025.3536377
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
An intrusion detection system (IDS) plays a crucial role in network security by distinguishing hostile activities from network traffic. Conventional hardware-based IDS architectures have high throughput and low energy consumption but suffer from poor detection accuracy. By contrast, software-based systems using machine learning and deep learning techniques can significantly improve detection accuracy. Nevertheless, owing to the implementation requirements of von Neumann computer architectures, their long inference time makes them unsuitable for application to large networks and high-bandwidth connections. To address this issue, this study proposes a novel dendritic neural model ensemble for intrusion detection. A logic circuit-based IDS is designed based on mutual information-based feature selection and ensemble learning algorithms. The IDS consists of logic gates, comparators, shift registers, and accumulators and was successfully implemented in a field programmable gate array (FPGA) device. Experimental results reveal that the proposed IDS shows both higher detection accuracy and higher detection speed than the state-of-the-art detection methods on two modern intrusion detection datasets. Therefore, it can be regarded as a powerful and efficient IDS in practical applications. The source code is available at https://jijunkai123.github.io/DNM/.
引用
收藏
页码:20 / 32
页数:13
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