Real-time implementation of non-integer oversampling timing recovery algorithm incorporating IQ compensation for coherent optical communication systems

被引:0
作者
Zou, Benyao [1 ,2 ]
Wang, Wei [1 ,2 ]
Dong, Kaiyang [1 ,2 ]
Wang, Hong [1 ,2 ]
Li, Fan [1 ,2 ]
机构
[1] Sun Yat Sen Univ, Sch Elect & Informat Technol, Guangzhou 510275, Peoples R China
[2] Sun Yat Sen Univ, Guangdong Prov Key Lab Optoelect Informat Proc Chi, Guangzhou 510275, Peoples R China
基金
中国国家自然科学基金;
关键词
Coherent optical communication; Timing recovery; Digital signal processing; Field programmable gate array; BLIND EQUALIZATION; QPSK; TRANSCEIVERS;
D O I
10.1016/j.yofte.2025.104261
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In coherent optical communication systems, digital signal processing (DSP) plays a critical role in achieving efficient signal recovery and demodulation. The traditional analog-to-digital converter (ADC) must operate at integer oversampling (>= 2 samples per symbol, SPS) to support accurate timing recovery algorithms. However, the computational complexity involved in processing individual symbols presents significant challenges in meeting the low-power consumption demands of high-speed optical modules. In this paper, we propose a timing recovery algorithm based on the Modified-Godard algorithm for coherent optical communication systems that can work under non-integer baudrate oversampling, which greatly reduces the complexity of DSP and effectively alleviates the demand for ADC with high oversampling rates. Our algorithm enables simultaneous timing recovery and IQ skew compensation in the frequency domain (FD). In order to ensure the reliability of our DSP algorithms under non-integer baudrate oversampling, we analyze and simulate the impact of the laser frequency offset and IQ skew on the timing recovery algorithm. Finally, the DSP algorithms are further implemented on a field-programmable gate array (FPGA) chip. The experimental results demonstrate that the real-time coherent receiver achieves a minimum received optical power of -35-dBm at the KP4-FEC BER threshold, while reducing the ADC sampling rate by 42.9 % compared to conventional timing recovery schemes.
引用
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页数:11
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