Carrier-Based Implementation of SVPWM for a Three-Level Simplified Neutral Point Clamped Inverter with XOR Logic Gates

The three-level simplified neutral point clamped (3L-SNPC) inverter has received increasing attention in recent years due to its potential applications in electrical drives and smart grids with renewable energy integration. However, most existing research has primarily focused on control development, with limited studies investigating modulation strategies or analyzing inverter losses under varying operating conditions. These aspects are critical for practical industrial applications. To address this gap, this paper proposes a novel carrier-based space vector pulse width modulation (CB-SVPWM) strategy for the 3L-SNPC inverter, aimed at simplifying PWM implementation and reducing cost. The proposed modulation strategy is experimentally evaluated by comparing inverter losses and total harmonic distortion with those of the conventional three-level neutral point clamped (3L-NPC) inverter under an equivalent carrier-based modulation scheme. A comprehensive comparative analysis is conducted across the full modulation range to demonstrate the effectiveness of the proposed approach, achieving a 13.2% reduction in total power loss, a 33.6% improvement in execution time, and maintaining a comparable weighted total harmonic distortion (WTHD) with a deviation within 0.04% of the conventional 3L-NPC inverter.