PROCESSOR DESIGN AND APPLICATION OF FUTURISTIC

Many devices consist of low-power processor. Quantum-dot-cellular-automata (QCA) based processor designs provide enhanced performance compared with conventional metal-oxide-semiconductor (MOS) based processors. Nanocomputing-based processors are often energy-efficient. We have developed Nanotechnology QCA-based different subcomponents of processor such as 2-to-4 decoder, 3-to-8 decoder, Delay Flip-flop (D-FF), and sequence counter. A potential energy proof has been measured in the 2-to-4 decoder design. The synthesis approach algorithm has been presented for all designs. Further, the potential energy calculation results show for 2-to-4 decoder. According to the synthesis results 2-to-4 decoder has improved 82.3% cell count, 86% area, and 85% latency over previous work. Comparing the primitive results with the prior one, results improved by 64% and 76% in terms of cell count and area in the design of the 3-to-8 decoder. Among the different components of the processor is D-FF, which has an improvement of 66.37% in cell counts and 62.5% in area over the prior design. Primitive results have improved, including latency, cell count, and area, showing the proposed processor design is comparable to lowpower devices and high speed. In terms of balance power, the proposed subcomponent of the processor will benefit low power device.