Cryogenic Hyperdimensional In-Memory Computing Using Ferroelectric TCAM

被引:0
|
作者
Singh Parihar, Shivendra [1 ,2 ]
Kumar, Shubham [1 ,2 ]
Chatterjee, Swetaki [1 ,2 ]
Pahwa, Girish [3 ]
Singh Chauhan, Yogesh [2 ]
Amrouch, Hussam [4 ]
机构
[1] Univ Stuttgart, Semicond Test & Reliabil STAR, D-70174 Stuttgart, Germany
[2] Dept Elect Engn, IIT Kanpur, Kanpur 208016, India
[3] Natl Yang Ming Chiao Tung Univ, Int Coll Semicond Technol, Hsinchu 30010, Taiwan
[4] Tech Univ Munich, Munich Inst Robot & Machine Intelligence, Chair AI Processor Design, TUM Sch Computat Informat & Technol, D-80333 Munich, Germany
来源
IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS | 2025年 / 11卷
关键词
Cryogenics; Vectors; Arrays; Transistors; Iron; CMOS technology; Temperature distribution; FinFETs; Semiconductor device modeling; Nonvolatile memory; 5-nm fin field-effect transistor (FinFET); compact modeling; cryogenic complementary metal oxide semiconductor (CMOS); ferroelectric fin field-effect transistor (FeFinFET); hyperdimensional computing (HDC); in-memory computing (IMC); CONTENT-ADDRESSABLE MEMORY; HIGH-SPEED; ELECTRONICS; READOUT; CMOS;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Cryogenic operations of electronics present a significant step forward to achieve huge demand of in-memory computing (IMC) for high-performance computing, quantum computing, and military applications. Ferroelectric (FE) is a promising candidate to develop the complementary metal oxide semiconductor (CMOS)-compatible nonvolatile memories. Hence, in this work, we investigate the effectiveness of IMC using emerging FE technology at the 5-nm technology node. To achieve that, we begin by characterizing commercial 5-nm fin field-effect transistors (FinFETs) from room temperature (300 K) down to cryogenic temperature (10 K). Then, we carefully calibrate the first industry-standard cryogenic-aware compact model [Berkeley Short-channel IGFET Model-Common Multi-Gate (BSIM-CMG)] to accurately reproduce the measurements. Afterward, we use the Preisach-model-based approach to incorporate the impact of FE within the BSIM-CMG model framework using the measurements from FE capacitor to realize ferroelectric fin field-effect transistors (Fe-FinFETs) operating from 300 down to 10 K. Then, as proof of concept, we focus on $1\times 8$ ternary content addressable memory (TCAM) array that is used to perform language classification and voice recognition using brain-inspired hyperdimensional IMC. Our comprehensive analysis spans from investigating the delay, power, and energy efficiency of TCAM-based IMC all the way up to calculating error probabilities in which we compare the figure of merits obtained from the emerging Fe-FinFET against classical FinFET-based IMC. We reveal that cryogenic temperatures lead to the worst performance in Fe-FinFET-based TCAM. Hence, we have also proposed solutions to improve the cryogenic performance of Fe-FinFET-based TCAM.
引用
收藏
页码:34 / 41
页数:8
相关论文
共 50 条
  • [41] Infinity Stream: Enabling Transparent and Automated In-Memory Computing
    Wang, Zhengrong
    Liu, Christopher
    Nowatzki, Tony
    IEEE COMPUTER ARCHITECTURE LETTERS, 2022, 21 (02) : 85 - 88
  • [42] NNgine: Ultra-Efficient Nearest Neighbor Accelerator Based on In-Memory Computing
    Imani, Mohsen
    Kim, Yeseong
    Rosing, Tajana
    2017 IEEE INTERNATIONAL CONFERENCE ON REBOOTING COMPUTING (ICRC), 2017, : 228 - 235
  • [43] Impact of Random Phase Distribution in Ferroelectric Transistors-Based 3-D NAND Architecture on In-Memory Computing
    Choe, Gihun
    Shim, Wonbo
    Wang, Panni
    Hur, Jae
    Khan, Asif Islam
    Yu, Shimeng
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2021, 68 (05) : 2543 - 2548
  • [44] eCIMC: A 603.1-TOPS/W eDRAM-Based Cryogenic In-Memory Computing Accelerator Supporting Boolean/Convolutional Operations
    Shu, Yuhao
    Zhang, Hongtu
    Deng, Qi
    Sun, Hao
    Lv, Zhaodong
    Li, Yifei
    Ha, Yajun
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2024, 59 (11) : 3827 - 3839
  • [45] Linear Error Correction Codec Implementation Based on an In-Memory Computing Architecture for Nonvolatile Memories
    Luo, Lichuan
    Liu, Xiao
    Jiang, Linjun
    Zhang, He
    Zhang, Youguang
    Liu, Dijun
    Kang, Wang
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (06) : 3455 - 3461
  • [46] In-Memory Computing with Memristor Content Addressable Memories for Pattern Matching
    Graves, Catherine E.
    Li, Can
    Sheng, Xia
    Miller, Darrin
    Ignowski, Jim
    Kiyama, Lennie
    Strachan, John Paul
    ADVANCED MATERIALS, 2020, 32 (37)
  • [47] MOL-Based In-Memory Computing of Binary Neural Networks
    Ali, Khaled Alhaj
    Baghdadi, Amer
    Dupraz, Elsa
    Leonardon, Mathieu
    Rizk, Mostafa
    Diguet, Jean-Philippe
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 30 (07) : 869 - 880
  • [48] Deep In-Memory Architectures in SRAM: An Analog Approach to Approximate Computing
    Kang, Mingu
    Gonugondla, Sujan K.
    Shanbhag, Naresh R.
    PROCEEDINGS OF THE IEEE, 2020, 108 (12) : 2251 - 2275
  • [49] Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture
    Wang, Xueyan
    Yang, Jianlei
    Zhao, Yinglin
    Jia, Xiaotao
    Yin, Rong
    Chen, Xuhang
    Qu, Gang
    Zhao, Weisheng
    IEEE TRANSACTIONS ON COMPUTERS, 2022, 71 (10) : 2462 - 2472
  • [50] Configurable 8T SRAM for Enbling in-Memory Computing
    Chen, Han-Chun
    Li, Jin-Fu
    Hsu, Chun-Lung
    Sun, Chi-Tien
    PROCEEDINGS OF 2019 2ND INTERNATIONAL CONFERENCE ON COMMUNICATION ENGINEERING AND TECHNOLOGY (ICCET 2019), 2019, : 139 - 142