Implementation of Multiply Accumulate Operation and Convolutional Neural Network Based on Ferroelectric Tunnel Junction Memristors

被引:0
作者
Cheng, Ziming [1 ,2 ]
Wang, He [1 ,2 ]
Guan, Zeyu [1 ,2 ]
Zhu, Zhengxu [1 ,2 ]
Shen, Shengchun [1 ,2 ]
Yin, Yuewei [1 ,2 ]
Li, Xiaoguang [1 ,2 ,3 ]
机构
[1] Univ Sci & Technol China, Hefei Natl Res Ctr Phys Sci Microscale, Dept Phys, Hefei 230026, Peoples R China
[2] Univ Sci & Technol China, CAS Key Lab Strongly Coupled Quantum Matter Phys, Hefei 230026, Peoples R China
[3] Nanjing Univ, Collaborat Innovat Ctr Adv Microstruct, Nanjing 210093, Peoples R China
基金
中国国家自然科学基金;
关键词
ferroelectric tunnel junction; memristor; artificialsynapse; multiply accumulation; in-memory computing; convolutional neural network; CLASSIFICATION; RECOGNITION; PLASTICITY;
D O I
10.1021/acsami.5c00740
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
In the era of big data, traditional Von Neumann computers suffer from inefficiencies in terms of energy consumption and speed associated with data transfer between storage and processing. In-memory computing using ferroelectric tunnel junction (FTJ) memristors offers a potential solution to this challenge. Here, Hf0.5Zr0.5O2-based FTJs on a silicon substrate are fabricated, which demonstrates 32 conductance states (5-bit), low cycle-to-cycle variation (1.6%) and highly linear (nonlinearity <1) conductance manipulation. Based on an FTJ array with multiple FTJ devices, a custom-designed board with a field programmable gate array is utilized to perform accurate multiply accumulate operations and for image processing as various convolution operators. Notably, using FTJ devices as a convolutional layer, the convolutional neural network achieves a high accuracy of 92.5% for handwritten digit recognition, and exhibits orders of magnitude better energy efficiency compared to traditional CPU and GPU implementations. These findings highlight the promising potential of FTJs for realizing in-memory computing at the hardware level.
引用
收藏
页码:21440 / 21447
页数:8
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