A 94.4fsrms Cryogenic Sub-Sampling PLL in 4K for Quantum Computing Applications

被引：0

作者：

Peng Shuting ^{[1
]}

Shen Fang ^{[1
]}

Fan Xiong ^{[2
,3
]}

Xu Jie ^{[2
,3
]}

Wang Cheng ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, Chengdu 611731, Peoples R China

[2] Natl Univ Def Technol, Changsha 410000, Peoples R China

[3] Key Lab Satellite Nav Technol, Changsha 410000, Peoples R China

来源：

2024 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY, RFIT | 2024年

关键词：

SSPLL; PI; DTC; quantum interface;

D O I：

10.1109/RFIT60557.2024.10812563

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper presents a fractional-N sub-sampling PLL (SSPLL) for cryogenic frequency source of in the quantum measurement and controller system. The proposed SSPLL adopts a 5-bit vector modulator (VM) based phase-interpolator (PI) and a 5-bit digital-to-time converter (DTC) for in-band phase noise suppression. According to the measured result, the SSPLL spans from 11.4GHz to 13.8GHz in 4K. When the SSPLL is divided by two, the output frequency is 6.3GHz. The measured RMS jitter is 94.37fs, the phase noise is -113.72dBc/Hz@100kHz, and the figure-of-the-merit (FoM) of -245.9dB is achieved.

引用

页数：3