Are SNNs Truly Energy-efficient? - A Hardware Perspective

被引:1
|
作者
Bhattacharjee, Abhiroop [1 ]
Yin, Ruokai [1 ]
Moitra, Abhishek [1 ]
Panda, Priyadarshini [1 ]
机构
[1] Yale Univ, Dept Elect Engn, New Haven, CT 06520 USA
来源
2024 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH AND SIGNAL PROCESSING (ICASSP 2024) | 2024年
基金
美国国家科学基金会;
关键词
Spiking Neural Networks; Systolic-arrays; In-memory Computing; Crossbars; Energy-efficiency;
D O I
10.1109/ICASSP48485.2024.10448269
中图分类号
O42 [声学];
学科分类号
070206 ; 082403 ;
摘要
Spiking Neural Networks (SNNs) have gained attention for their energy-efficient machine learning capabilities, utilizing bio-inspired activation functions and sparse binary spike-data representations. While recent SNN algorithmic advances achieve high accuracy on large-scale computer vision tasks, their energy-efficiency claims rely on certain impractical estimation metrics. This work studies two hardware benchmarking platforms for large-scale SNN inference, namely SATA and SpikeSim. SATA is a sparsity-aware systolic-array accelerator, while SpikeSim evaluates SNNs implemented on In-Memory Computing (IMC) based analog crossbars. Using these tools, we find that the actual energy-efficiency improvements of recent SNN algorithmic works differ significantly from their estimated values due to various hardware bottlenecks. We identify and addresses key roadblocks to efficient SNN deployment on hardware, including repeated computations & data movements over timesteps, neuronal module overhead and vulnerability of SNNs towards crossbar non-idealities.
引用
收藏
页码:13311 / 13315
页数:5
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