Challenges and Innovations in CMOS-Based 300-GHz Transceivers for High-Speed Wireless Communication

被引:0
作者
Fujishima, Minoru [1 ]
机构
[1] Hiroshima Univ, Grad Sch Adv Sci & Engn, Hiroshima 7398530, Japan
来源
IEEE OPEN JOURNAL OF THE SOLID-STATE CIRCUITS SOCIETY | 2025年 / 5卷
基金
日本学术振兴会;
关键词
Transceivers; Radio frequency; Circuits; Mixers; Wireless communication; Quadrature amplitude modulation; Phased arrays; IEEE; 802.15; Standard; Baseband; Bandwidth; 300-GHz communication; carrier recovery; CMOS technology; high-speed demodulation; 802.15.3d; low-resolution analog-to-digital conversion (ADC); mixed-signal circuits; phased array; power combining; QPSK modulation; synchronous symbol carrier; ultrahigh-speed wireless networks; PHOTOMIXER; TRANSMITTER; CHIPSET; ANTENNA; DESIGN; LINK;
D O I
10.1109/OJSSCS.2024.3519054
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The IEEE 802.15.3d standard, issued in October 2017, defined a high-data-rate wireless physical layer using the 252-325-GHz frequency band, also known as the 300-GHz band, enabling data rates up to 100 Gb/s. This article explores the challenges and innovations associated with realizing 300-GHz transceivers using CMOS technology, which, despite its inherent limitations in high-frequency amplification, remains a critical technology for consumer electronics. The unique advantages of CMOS, such as suitability for mass production, make it an indispensable candidate for future terahertz devices. This article discusses the challenges of implementing CMOS transceivers at such high frequencies, focusing on power amplification, phased array architectures, and low-power, high-speed demodulation circuits. The solutions presented here pave the way for making 300-GHz communication practical for widespread consumer use.
引用
收藏
页码:21 / 32
页数:12
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