An Advanced Packaging Figure of Merit (AP-FoM) for Benchmarking of Heterogeneous Integration Technologies

被引:0
作者
Wang, Chuei-Tang [1 ]
Shang, Shu-An [1 ]
Hsiao, Yu-Ming [1 ]
Lii, Mirng-Ji [1 ]
Lee, Kam Heng [1 ]
He, Jun [1 ]
机构
[1] Taiwan Semicond Mfg Co Ltd, Hsinchu, Taiwan
来源
PROCEEDINGS OF THE IEEE 74TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, ECTC 2024 | 2024年
关键词
Figure-of-Merit; Package; CoWoS; HPC; AI; UCIe; HBM; INTERCONNECT;
D O I
10.1109/ECTC51529.2024.00175
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A novel advanced packaging figure of merit (AP-FoM) for benchmarking of heterogeneous integration technology performance is proposed in this paper. The AP-FoM is composed of eye width, RC time and jitter in equation of [Eye width / (RC time*Jitter)], related to the electrical characteristics of packaging interconnect, unlike conventional FoM (c-FoM) using bandwidth density and power efficiency in [(Bandwidth / Shoreline) / (Energy / bit)], more related to protocols. The AP-FoM is used to judge the performance of CoWoS-R organic interposer and CoWoS-S silicon interposer, respectively, under the protocols of UCIe and HBM3E both. The signal integrity (SI) performances are simulated on both technologies and the data are used in the AP-FoM to calculate the performance. The results show the AP-FoM can help judge the technology difference effectively and help design interconnect metal scheme for better performance. Other figure of merit, such as routability or cost, will be investigated in the future.
引用
收藏
页码:1093 / 1097
页数:5
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